The present invention relates generally to a sequence estimator such as a Viterbi equalizer suitable for data detection in time dispersive wireless channels in particular with a large symbol set, for example, 8 character symbols.
Sequence estimators, such as Viterbi detectors are used for decoding intersymbol interference channels for digital communication. In decoding an intersymbol interference channel, maximum likelihood sequence estimation, implemented with a Viterbi detector, has a significant performance gain compared to other detection techniques. However, the implementation complexity of maximum likelihood sequence estimation is generally larger than other detection techniques, and the increase in complexity could present a challenge for low-power and high-speed implementation. It is therefore desirable to reduce the implementation complexity of the Viterbi detector at the expense of a reasonable, preferably negligible, performance loss compared to maximum likelihood sequence estimation.
A Viterbi detector implements the maximum likelihood sequence estimation with a recursive approach. The complexity of the Viterbi detector, in other words the number of states in the trellis, which shows the transition from multiple previous states to multiple current states, is given as a symbol alphabet raised to the length of the channel memory. This length is equal to XK, where X is number of different characters per symbol and K the number of symbols in a trellis code. Within an environment with X=2, such as a direct digital representation in which one character, for example xe2x80x9cxe2x88x921xe2x80x9d, represents a digital zero and one character, for example xe2x80x9c1xe2x80x9d, represents a digital one, the complexity is limited and up to 5 symbols per trellis code will not cause a big burden on a signal processor. However, faster standards require more different characters per symbol. For example, X=8 could be a possible number of characters per symbol in a high speed application. Other higher numbers for X are possible to increase transmission speed. For example, for X=8 in a 6-tap Viterbi equalizer the number of states in the trellis would become 85=32768.
A delayed decision feedback sequence estimator (DDFSE) is a known technique to reduce the number of states in the trellis by canceling the inter-symbol interference (ISI) based on the tentative decision on the older symbols in the tapped delay line. However, the DDFSE can give poor performance in cases where the channel energy extends outside the DDFSE memory. One way to combat this problem is by applying pre-filtering which results in a minimum-phase system. However, this creates additional noise and computational load and may result in numerical instability.
The reduced-state sequence estimator with set partitioning (RSSE/SP) is a known technique to reduce the number of states in the trellis by removing paths which correspond to less likely data sequences given the received signal. In contrast to other reduced-state algorithms such as the above mentioned DDSFE, the RSSE/SP improves the performance/complexity ratio by utilizing geometry information in the symbol constellation. However, due to error propagation, the RSSE/SP can give poor performance in cases where the channel impulse response has a pre-cursor portion, which means that the first path is not the strongest path. This situation might happen while traveling in urban area, or for data detection when the training sequence is in the middle of a burst, such as in certain wireless standards. Although a pre-filter can reshape the channel impulse response, the pre-filter however enhances the noise, increases computational load, and may result in numerical instability.
It is therefore an object of the present invention to provide a sequence estimator that overcomes the above mentioned problems.
According to a specific embodiment, the present invention provides a method of determining a trellis for a Viterbi detector based on estimated tap energy of the channel. The method includes the steps of receiving a sequence of n symbols, defining partitioned sets according to a decision tree structure, and determining size of each set partitioning according to tap energy of the channel. The method also includes the step of determining a reduced set of connection paths between the current layer and a destination layer in the trellis by determining a value of a most likely oldest partitioned set in a current layer, and calculating branch metrics only for the current layers in the trellis in which the oldest partitioned set matches the determined value. According to a more specific embodiment, the step of defining the partitioned sets for each symbol according to a decision tree can be dependent on the channel coefficients of the symbol sequence.
A more complete understanding of this and other specific embodiments of the present invention and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features.